Efficient parallelization for 3d-3v sparse grid Particle-In-Cell: Shared memory architectures

Particle-In-Cell (PIC) schemes are ones of the most broadly used numerical methods in kinetic simulation plasmas. The contribution present paper is dedicated to introduction novel parallelization strategies specific shared memory architectures tailored for implementing sparse grid reconstructions. These operate different parallelisms genuine Sparse-PIC obtain speed-up exceeding 100 on 128 cores using a strong scaling study 3d-3v simulation. On top that, substantial gains (two orders magnitude) introduced sequential as well parallel computation electric field thanks hierarchization procedure. It consists decomposing information carried by grids onto hierarchical basis functions, entailing significantly reduced number operations.